A block diagram of the GuPPI is shown above. We use a PCI-PCI bridge chip to electrically isolate the rest of the logic from the primary PCI bus; this allows us to attach multiple loads to our secondary PCI bus. The Xilinx PCI controller is a master/target PCI device within a XC4013E-2 Xilinx part.
Rather than using scatter/gather DMA, the GuPPI accepts the physical page addresses within large memory buffers allocated by a user-level device driver. This mode of operation is well suited to the transfer of a continuous sample stream. The GuPPI can transfer samples into host memory at rates up to 930 Mbps and from host memory at rates up to 830 Mbps.
A rough specification of the GuPPI can be found here.
Making Commodity PCs fit for Signal Processing, a paper about the GuPPI presented at USENIX'98.
For more information about the GuPPI, contact firstname.lastname@example.org