Formal Methods in Computer-Aided Design (FMCAD'96): Call For Papers

          |                                                       |
          |                   CALL FOR PAPERS                     |
          |                                                       |
          |         The International Conference on               |
          |                                                       |
          |     Formal Methods in Computer-Aided Design:	  |
          |           (FMCAD -- Successor to TPCD)                |
          |                                                       |
          |                Palo Alto, CA, USA                     |
          |               6 - 8. November 1996                    |
          |                                                       |
          |         In cooperation with  IFIP WG 10.5             |
          |                                                       |


International Conference on Formal Methods in Computer-Aided Design
'96 (FMCAD '96) is a forum for presenting state-of-the-art tools and
techniques based on formal methods for computer-aided design of
hardware.  The location of the conference provides a unique
opportunity for researchers in the field to interact with engineers
from the Silicon Valley semiconductor and CAD companies.  The
objective is to cover all relevant formal aspects of work in
computer-aided system design including verification, synthesis and
testing.  A special focus of this conference will be on the
integration of complementary techniques and tools.  The conference,
will cover original research in this area, as well as case studies,
technology transfer, and other practical experiments.  It is intended
to publish the Proceedings in time for distribution at the conference
in the Springer LNCS series.

Specific technical areas of FMCAD '96 include, but are not limited to:

 * New hardware verification techniques based on theorem proving,
   state exploration, model-checking, and BDDs
 * Correct by construction approaches to hardware design, such as
   synthesis and transformation
 * Hybrid approaches that integrate synthesis and verification or
   different verification techniques
 * Integration of formal methods with CAD tools, such as synthesis,
   simulation, and design exploration
 * Formal verification techniques for hardware description languages,
   such as VHDL, Verilog
 * Case studies and application of formal methods in industry
This conference is a sequel in a series of IFIP WG 10.2/10.5 sponsored
conferences with similar themes that have been most recently held in
1992 and 1994 under the banner ``Theorem Provers In Circuit Design.''
The intended audience includes workers in the field of hardware
verification and synthesis as well as practising digital designers
with an interest in formal methods.  The conference will include
contributed research papers, invited talks, tutorials, and tool

(1) David Dill, Stanford University, USA
(2) Kurt Kuetzer, Synposys Inc., USA
(3) J S. Moore, Computational Logic Inc., USA

PAPERS: 15 page limit (double-spaced), 11-point limit with abstract,
containing original research in sufficient detail to assess its merits
and relevance.  Simultaneous submission to other conferences and
submission of previously published material are not allowed.

TUTORIALS: 4 page abstract, 15 page (double-spaced), 11-point for
final.  We encourage presentations of tools on a suitable set of
completely worked out examples.

Submit in electronically self-contained Postscript to:
fmcad96@csl.sri.com.  Email submission is strongly encouraged for
speeding up the reviewing process. When this is not possible, send
seven hard-copies to:

  PAPERS                                  TUTORIALS
  --------------                          --------------
  Mandayam Srivas                         Albert Camilleri
  Re: FMCAD '96				  Re: FMCAD '96
  SRI International (EL-262)              HEWLETT-PACKARD COMPANY M/S 5596
  333 Ravenswood Avenue                   8000 FOOTHILLS BOULEVARD
  Menlo Park, CA 94025, USA               ROSEVILLE  CA 95747-5596, USA
  Email: srivas@csl.sri.com               Email: ac@hprpcd.rose.hp.com
  Tel: +1 415-859-6136                    Tel  : +1 916 785 8488
  Fax: +1 415-859-2844                    Fax  : +1 916 785 3096

Please direct all paper and program inquiries to fmcad96@csl.sri.com.
Registration questions may be directed to vijay@lsil.com.  For more information
see our World Wide Web home page at http://www.csl.sri.com/FMCAD96.


  Submission deadline (firm):			April 15, 1996
  Notification of acceptance:			June 17, 1996
  Proceedings version of accepted papers due:   July 15, 1996


   Program Chair:    Mandayam Srivas, SRI International, USA
   Tutorials Chair:    Albert Camilleri, Hewlett Packard Company, USA
   Registration Chair: Vijay Nagasamy, LSI Logic Inc., USA


D. Borrione (TIMA, France)
R. Brayton (University of California, Berkeley, USA)
R. Bryant (CMU, USA)
R. Camposano (Synposys Inc., USA)
L. Claesen  (IMEC, Belgium)
E. Clarke (CMU, USA)
M. Fujita (Fujitsu Labs, USA)
S. German (IBM, Yorktown Heights, USA)
M. Gordon (University of Cambridge, UK)
O. Grumberg (Technion, Haifa, Israel)
W. Hunt (Computational Logic, Inc., USA)
S. Johnson (University of Indiana, USA)
C. D. Kloos (Universidad Politecnica de Madrid, Spain)
R. Kumar (FZI, Karlsruhe, Germany)
M. Leeser (Northeastern University, USA)
P. Loewenstein (Sun Microsystems, USA)
K. McMillan (Cadence Berkeley Lab, USA)
C. Seger (Intel, Oregon, USA)
J. Staunstrup (Technical University, Denmark)
V. Stavridou (Queen Mary and Westfield College, UK)
P.A. Subrahmanyam (AT&T, USA)
J. Van Tassel (NSA, Washington DC, USA)